Invention Grant
- Patent Title: Nonvolatile latch circuit and nonvolatile flip-flop circuit
- Patent Title (中): 非易失性锁存电路和非易失性触发器电路
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Application No.: US13516875Application Date: 2012-01-19
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Publication No.: US08437177B2Publication Date: 2013-05-07
- Inventor: Yoshikazu Katoh
- Applicant: Yoshikazu Katoh
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2011-010284 20110120
- International Application: PCT/JP2012/000328 WO 20120119
- International Announcement: WO2012/098897 WO 20120726
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A nonvolatile latch circuit of the invention includes a variable resistance element which is formed by interposing an oxide layer between electrodes, and changes to a low resistance state by applying a voltage to cause current flow in the direction from the first to the second electrode, and changes to a high resistance state by applying a voltage to cause current flow in the reverse direction, wherein a first terminal of a transistor, a first terminal of other transistor, an output terminal of an inverter circuit, and an output terminal of other inverter circuit are respectively connected to one electrode, the other electrode, a second terminal of the transistor, and a second terminal of the other transistor, and a current flowing through the variable resistance element when changed to a low resistance state is smaller in absolute value than a current therethrough when changed to a high resistance state.
Public/Granted literature
- US20120280713A1 NONVOLATILE LATCH CIRCUIT AND NONVOLATILE FLIP-FLOP CIRCUIT Public/Granted day:2012-11-08
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