Invention Grant
- Patent Title: Semiconductor integrated circuit device with reduced leakage current
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Application No.: US13528025Application Date: 2012-06-20
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Publication No.: US08437179B2Publication Date: 2013-05-07
- Inventor: Kenichi Osada , Koichiro Ishibashi , Yoshikazu Saitoh , Akio Nishida , Masaru Nakamichi , Naoki Kitai
- Applicant: Kenichi Osada , Koichiro Ishibashi , Yoshikazu Saitoh , Akio Nishida , Masaru Nakamichi , Naoki Kitai
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Stites & Harbison, PLLC
- Agent Juan Carlos A. Marquez, Esq.
- Priority: JP2001-168945 20010605; JP2002-017840 20020128
- Main IPC: G11C11/40
- IPC: G11C11/40

Abstract:
The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.
Public/Granted literature
- US20120257443A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH REDUCED LEAKAGE CURRENT Public/Granted day:2012-10-11
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