Invention Grant
US08437183B2 Auxiliary parity bits for data written in multi-level cells 有权
用于在多级单元中写入的数据的辅助奇偶校验位

  • Patent Title: Auxiliary parity bits for data written in multi-level cells
  • Patent Title (中): 用于在多级单元中写入的数据的辅助奇偶校验位
  • Application No.: US13122469
    Application Date: 2009-12-16
  • Publication No.: US08437183B2
    Publication Date: 2013-05-07
  • Inventor: Eran SharonIdan Alrod
  • Applicant: Eran SharonIdan Alrod
  • Applicant Address: IL Kfar Saba
  • Assignee: Sandisk IL Ltd.
  • Current Assignee: Sandisk IL Ltd.
  • Current Assignee Address: IL Kfar Saba
  • Agency: Toler Law Group, PC
  • International Application: PCT/IB2009/007789 WO 20091216
  • International Announcement: WO2011/073710 WO 20110623
  • Main IPC: G11C11/34
  • IPC: G11C11/34
Auxiliary parity bits for data written in multi-level cells
Abstract:
Methods of writing data to and reading data from memory devices and systems for writing and reading data are disclosed. In a particular embodiment, a method includes writing data bits a first time into a memory. Auxiliary parity bits are written in the memory, where the auxiliary parity bits are computed based on the data bits. Subsequent to writing the data bits a first time and writing the auxiliary parity bits, the data bits are written a second time into the memory. Writing the data bits the first time and writing the data bits the second time are directed to one or more storage elements at a common physical address in the memory. Subsequent to writing the data bits the second time, the auxiliary parity bits are discarded while maintaining the data bits in the memory.
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