Invention Grant
US08437404B2 Implementation of a DV video decoder with a VLIW processor and a variable length decoding unit
有权
具有VLIW处理器和可变长度解码单元的DV视频解码器的实现
- Patent Title: Implementation of a DV video decoder with a VLIW processor and a variable length decoding unit
- Patent Title (中): 具有VLIW处理器和可变长度解码单元的DV视频解码器的实现
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Application No.: US11594462Application Date: 2006-11-07
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Publication No.: US08437404B2Publication Date: 2013-05-07
- Inventor: Amelia C. Luna , Jason (Naxin) Wang
- Applicant: Amelia C. Luna , Jason (Naxin) Wang
- Applicant Address: JP Tokyo US NJ Park Ridge
- Assignee: Sony Corporation,Sony Electronics Inc.
- Current Assignee: Sony Corporation,Sony Electronics Inc.
- Current Assignee Address: JP Tokyo US NJ Park Ridge
- Agent John L. Rogitz
- Main IPC: H04N11/02
- IPC: H04N11/02

Abstract:
A decoder for decoding a plurality of digital video data is described. In an embodiment, the decoder comprises a DV video decoder for decoding digital video data which is formatted according to the DV standard. The DV video decoder has a Very-Long Instruction Word (VLIW) processor and a variable length decoding unit. The VLIW processor includes a preparser unit for recovering a decoding order of the digital video data so that the variable length decoding unit can process the digital video data. The variable length decoding unit decodes a variable length coding format of the digital video data which has been preparsed by the VLIW processor. Furthermore, the VLIW processor includes a decompression unit for decompressing the digital video data which has been decoded by the variable length decoding unit. In an embodiment, the VLIW processor and the variable length decoding unit are formed on the same semiconductor device.
Public/Granted literature
- US20070052842A1 Implementation of a DV video decoder with a VLIW processor and a variable length decoding unit Public/Granted day:2007-03-08
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