Invention Grant
- Patent Title: Digital frequency locked delay line
- Patent Title (中): 数字锁频延时线
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Application No.: US13299085Application Date: 2011-11-17
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Publication No.: US08437428B2Publication Date: 2013-05-07
- Inventor: Curt Schnarr
- Applicant: Curt Schnarr
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: H04L27/00
- IPC: H04L27/00 ; H04B1/00

Abstract:
A device includes a signal generator having a delay locked circuit for providing a number of output signals based on an input signal. The output signals have a fixed signal relationship with each other and with the input signal. The signal generator also includes a selector for selecting an enable signal from a range of signals formed by the output signals. The device further includes a transceiver circuit in which the transceiver circuit uses the enable signal for data processing.
Public/Granted literature
- US20120063551A1 DIGITAL FREQUENCY LOCKED DELAY LINE Public/Granted day:2012-03-15
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