Invention Grant
US08438432B2 DRAM memory controller with built-in self test and methods for use therewith 有权
具有内置自检功能的DRAM内存控制器及其使用方法

DRAM memory controller with built-in self test and methods for use therewith
Abstract:
An integrated circuit is interfaced with at least one dynamic random access memory (DRAM) via a memory interface. A plurality of user test options are received. The testing of the memory interface is controlled in accordance with the plurality of user test options. Test data, generated as a result of the testing of the memory interface, is stored.
Information query
Patent Agency Ranking
0/0