Invention Grant
- Patent Title: Semiconductor memory device and controlling method
- Patent Title (中): 半导体存储器件及其控制方法
-
Application No.: US13218743Application Date: 2011-08-26
-
Publication No.: US08438454B2Publication Date: 2013-05-07
- Inventor: Shinichi Kanno , Osamu Torii
- Applicant: Shinichi Kanno , Osamu Torii
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-064831 20110323
- Main IPC: G11C29/00
- IPC: G11C29/00

Abstract:
According to an embodiment, a semiconductor memory device includes a nonvolatile memory; an input/output control unit to control input/output of data to/from the nonvolatile memory; an address translation table that associates first address information specifying a logical recording position of user data stored in the nonvolatile memory with second address information indicating a physical recording position in the nonvolatile memory; a translating unit to translate the first address information to the second address information according to the table; and a generating unit to generate redundant data for checking whether there is error in the user data and the first address information used as one data piece. The input/output control unit records, as data set, the user data, the first address information, and the redundant data, which are used as one data set, in the physical recording position in the nonvolatile memory indicated by the second address information.
Public/Granted literature
- US20120246387A1 SEMICONDUCTOR MEMORY DEVICE AND CONTROLLING METHOD Public/Granted day:2012-09-27
Information query