Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US13517879Application Date: 2012-06-14
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Publication No.: US08441051B2Publication Date: 2013-05-14
- Inventor: Hidekazu Miyairi
- Applicant: Hidekazu Miyairi
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2009-057437 20090311
- Main IPC: H01L29/76
- IPC: H01L29/76
Abstract:
A space is provided under part of a semiconductor layer. Specifically, a structure in which an eaves portion (a projecting portion, an overhang portion) is formed in the semiconductor layer. The eaves portion is formed as follows: a stacked-layer structure in which a conductive layer, an insulating layer, and a semiconductor layer are stacked in this order is etched collectively to determine a pattern of a gate electrode; and a pattern of the semiconductor layer is formed while side-etching is performed.
Public/Granted literature
- US20120248513A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2012-10-04
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