Invention Grant
- Patent Title: Memory devices including vertical pillars and methods of manufacturing and operating the same
- Patent Title (中): 存储器件包括垂直支柱及其制造和操作方法
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Application No.: US12471975Application Date: 2009-05-26
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Publication No.: US08441059B2Publication Date: 2013-05-14
- Inventor: Jae-Sung Sim , Jung-Dal Choi
- Applicant: Jae-Sung Sim , Jung-Dal Choi
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Onello & Mello, LLP
- Priority: KR10-2008-0054707 20080611
- Main IPC: H01L29/792
- IPC: H01L29/792

Abstract:
A semiconductor device includes a substrate of semiconductor material extending in a horizontal direction. A plurality of interlayer dielectric layers are provided on the substrate. A plurality of gate patterns are provided, each gate pattern being between a neighboring lower interlayer dielectric layer and a neighboring upper interlayer dielectric layer. A vertical channel of semiconductor material extends in a vertical direction through the plurality of interlayer dielectric layers and the plurality of gate patterns, a gate insulating layer between each gate pattern and the vertical channel that insulates the gate pattern from the vertical channel, the vertical channel being in contact with the substrate at a contact region that comprises a semiconducting region.
Public/Granted literature
- US20090310425A1 MEMORY DEVICES INCLUDING VERTICAL PILLARS AND METHODS OF MANUFACTURING AND OPERATING THE SAME Public/Granted day:2009-12-17
Information query
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