Invention Grant
- Patent Title: Semiconductor device and manufacturing method of the same
- Patent Title (中): 半导体器件及其制造方法相同
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Application No.: US12851101Application Date: 2010-08-05
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Publication No.: US08441065B2Publication Date: 2013-05-14
- Inventor: Hirokatsu Suzuki , Atsushi Fujiki , Yoshito Nakazawa
- Applicant: Hirokatsu Suzuki , Atsushi Fujiki , Yoshito Nakazawa
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Mattingly & Malur, PC
- Priority: JP2005-363815 20051216
- Main IPC: H01L29/76
- IPC: H01L29/76

Abstract:
A semiconductor device which combines reliability and the guarantee of electrical characteristics is provided. A power MOSFET and a protection circuit formed over the same semiconductor substrate are provided. The power MOSFET is a trench gate vertical type P-channel MOSFET and the conduction type of the gate electrode is assumed to be P-type. The protection circuit includes a planar gate horizontal type offset P-channel MOSFET and the conduction type of the gate electrode is assumed to be N-type. These gate electrode and gate electrode are formed in separate steps.
Public/Granted literature
- US20100315751A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME Public/Granted day:2010-12-16
Information query
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