Invention Grant
US08441282B2 Impedance calibration circuit and impedance calibration method 有权
阻抗校准电路和阻抗校准方法

Impedance calibration circuit and impedance calibration method
Abstract:
An integrated circuit includes a first ODT (On Die Termination) unit and an input buffer. The first ODT unit is configured to receive at least one pull-up code and at least one pull-down code and calibrate a resistance value for impedance matching of a first line transferring data. The input buffer is configured to buffer the data in response to a reference voltage level and drive input data. Herein, the driving of the input data is controlled in response to the pull-up code and the pull-down code.
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