Invention Grant
US08441319B2 Method and apparatus for biasing rail to rail DMOS amplifier output stage
有权
用于偏置轨至轨DMOS放大器输出级的方法和装置
- Patent Title: Method and apparatus for biasing rail to rail DMOS amplifier output stage
- Patent Title (中): 用于偏置轨至轨DMOS放大器输出级的方法和装置
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Application No.: US13236950Application Date: 2011-09-20
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Publication No.: US08441319B2Publication Date: 2013-05-14
- Inventor: Aidan Cahalane
- Applicant: Aidan Cahalane
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Kenyon & Kenyon LLP
- Main IPC: H03F3/26
- IPC: H03F3/26

Abstract:
An amplifier comprises: an input stage for receiving incoming signals; a high gain stage coupled to the input stage and providing driving signals in response to the incoming signals to an output driver stage; and an output terminal coupled to the output driver stage. The output driver stage comprises a high side driver circuit having a first terminal receiving a first driving signal pdrive from the high gain stage, a second terminal coupled VDD through a first voltage drop, and a third terminal coupled to the output terminal of the amplifier.
Public/Granted literature
- US20120319777A1 Method and Apparatus for Biasing Rail to Rail DMOS Amplifier Output Stage Public/Granted day:2012-12-20
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