Invention Grant
- Patent Title: Semiconductor device and test method thereof
- Patent Title (中): 半导体器件及其测试方法
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Application No.: US13137149Application Date: 2011-07-22
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Publication No.: US08441832B2Publication Date: 2013-05-14
- Inventor: Yasushi Matsubara
- Applicant: Yasushi Matsubara
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2010-176417 20100508
- Main IPC: G11C5/06
- IPC: G11C5/06

Abstract:
For example, to include plural data input/output terminals and a strobe terminal that are electrically connected in common by a test probe, a command address terminal that is connected to a test probe, and an output control circuit that performs a selecting operation of data output circuits based on a signal that is supplied to the command address terminal. According to the present invention, it is possible to perform a test that uses non-compressed actual data while allocating plural data input/output terminals to one determination circuit within a tester. With this configuration, it is possible to test a large number of semiconductor devices in parallel by using a limited number of determination circuits within the tester.
Public/Granted literature
- US20110280090A1 Semiconductor device and test method thereof Public/Granted day:2011-11-17
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