Invention Grant
US08444867B2 Method for fabricating patterns on a wafer through an exposure process
有权
通过曝光工艺在晶片上制造图案的方法
- Patent Title: Method for fabricating patterns on a wafer through an exposure process
- Patent Title (中): 通过曝光工艺在晶片上制造图案的方法
-
Application No.: US12582530Application Date: 2009-10-20
-
Publication No.: US08444867B2Publication Date: 2013-05-21
- Inventor: Hyun Jo Yang
- Applicant: Hyun Jo Yang
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Marshall, Gerstein & Borun LLP
- Priority: KR10-2009-0038126 20090430
- Main IPC: C03C25/68
- IPC: C03C25/68

Abstract:
A method for forming patterns on a wafer includes forming a fence having a sloped face in an edge portion of the wafer. The sloped face is direct to an inside of the wafer. A first photoresist layer is formed which extends to cover the fence on the wafer. First photoresist patterns are formed by performing a first exposure and development on the first photoresist layer. An etch process is performed using the first photoresist patterns and the fence as an etch mask. The fence is formed by selectively exposing a negative resist using a light shielding blade, and at this time, the first photoresist layer is formed including a positive resist.
Public/Granted literature
- US20100279505A1 METHOD FOR FABRICATING PATTERNS ON A WAFER THROUGH AN EXPOSURE PROCESS Public/Granted day:2010-11-04
Information query