Invention Grant
US08445334B1 SOI FinFET with recessed merged Fins and liner for enhanced stress coupling
失效
SOI FinFET具有凹入的合并Fins和衬垫,用于增强应力耦合
- Patent Title: SOI FinFET with recessed merged Fins and liner for enhanced stress coupling
- Patent Title (中): SOI FinFET具有凹入的合并Fins和衬垫,用于增强应力耦合
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Application No.: US13330746Application Date: 2011-12-20
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Publication No.: US08445334B1Publication Date: 2013-05-21
- Inventor: Veeraraghavan S. Basker , Huiming Bu , Effendi Leobandung , Theodorus E. Standaert , Tenko Yamashita , Chun-Chen Yeh
- Applicant: Veeraraghavan S. Basker , Huiming Bu , Effendi Leobandung , Theodorus E. Standaert , Tenko Yamashita , Chun-Chen Yeh
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84

Abstract:
FinFETS and methods for making FinFETs with a recessed stress liner. A method includes providing an SOI substrate with fins, forming a gate over the fins, forming an off-set spacer on the gate, epitaxially growing a film to merge the fins, depositing a dummy spacer around the gate, and recessing the merged epi film. Silicide is then formed on the recessed merged epi film followed by deposition of a stress liner film over the FinFET. By using a recessed merged epi process, a MOSFET with a vertical silicide (i.e. perpendicular to the substrate) can be formed. The perpendicular silicide improves spreading resistance.
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