Invention Grant
- Patent Title: Multilayer wiring substrate having a castellation structure
- Patent Title (中): 具有星座结构的多层布线基板
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Application No.: US12659258Application Date: 2010-03-02
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Publication No.: US08446002B2Publication Date: 2013-05-21
- Inventor: Noriko Shibuta , Tohru Terasaki , Tomoyasu Yamada , Nobuo Naito , Yukihiko Tsukuda , Ryu Nonoyama
- Applicant: Noriko Shibuta , Tohru Terasaki , Tomoyasu Yamada , Nobuo Naito , Yukihiko Tsukuda , Ryu Nonoyama
- Applicant Address: JP Tokyo
- Assignee: Sony Corporation
- Current Assignee: Sony Corporation
- Current Assignee Address: JP Tokyo
- Agency: Rader Fishman & Grauer, PLLC
- Priority: JP2009-083658 20090330
- Main IPC: H01L23/053
- IPC: H01L23/053 ; H01L23/12 ; H01L27/15 ; H01L29/267 ; H01L31/12 ; H01L33/00 ; H01L29/73 ; H01L29/74 ; H01L31/111 ; H01L31/00 ; H01L29/40
Abstract:
A multilayer wiring substrate has a through hole that passes from a first surface through to a second surface. The multilayer wiring substrate includes an electrical connection terminal formed in at least one of an inner edge portion which is a periphery of the through hole, an outer edge portion which is an outer periphery of the substrate, and a non-edge portion, on at least one of the first surface and the second surface. The electrical connection terminal has a castellation structure that does not pass through to a surface opposite to a formation surface.
Public/Granted literature
- US08344501B2 Multilayer wiring substrate having a castellation structure Public/Granted day:2013-01-01
Information query
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