A pixel array of a fringe field switching (FFS) liquid crystal display panel includes a plurality of gate lines, a plurality of data line, a plurality of pixel electrodes, and a plurality of common lines. The gate lines are disposed parallel to each other along a first direction. The data lines are disposed parallel to each other along a second direction. A plurality of sub-pixel regions is defined by the gate lines and the data lines. The common lines are disposed along the first direction and electrically isolated from each other. Each of the common lines includes a plurality of common electrodes extending along the second direction. The two adjacent common electrodes of each common line are respectively disposed in the two adjacent sub-pixel regions which are located in different rows.