A device comprises a nonvolatile memory cell array, a buffer circuit, a program control circuit, and a read control circuit. The nonvolatile memory cell array comprises a plurality of memory cells. The program control circuit stores program data in the buffer circuit. The read control circuit reads data from a selected address of the nonvolatile memory cell array. The program control circuit compares the program data with the read data, and sets a bit of the program data as a program-inhibit bit based on the comparison.