A method and system are provided in which a multimedia processor comprises a first portion associated with a first of a plurality of power domains and a second portion associated with a second of the plurality of power domains. The first portion and the second portion of the multimedia processor are integrated on a single substrate. Data may be transferred from the first portion to the second portion and, upon completing the transfer, the first portion may be powered down and state information associated with it stored. The state information may be stored in an external SDRAM. The data in the second portion of the multimedia processor may be transferred to an external device through a peripheral module in the second portion. When a trigger event associated with the data transfer to the external device occurs, the first portion may be powered up and rebooted using the stored state information.