Wafer protecting grooves (10) are provided on an innermost wall (1b) of a container body (1). The wafer protecting grooves have a cross-sectional configuration in the shape of undulations having bottoms (10b), which are most distant from an opening (1a), at respective positions facing the outer edges of semiconductor wafers (W), and having an opening width wider than the thickness of each semiconductor wafer (W). In a normal state, an imaginary line (Q) connecting together the tops of the undulations is inward of or at the same position as the outer edges of the semiconductor wafers (W) facing the imaginary line. Thus, it is possible to obtain superior impact resistance that makes the semiconductor wafers (W) in the container body (1) unlikely to be damaged even when a large impact is applied thereto by a fall or other handling errors.