Invention Grant
US08455269B2 Method for recovering an on-state forward voltage and, shrinking stacking faults in bipolar semiconductor devices, and the bipolar semiconductor devices
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用于恢复双极半导体器件中的导通状态正向电压和收缩堆垛层错的方法以及双极型半导体器件
- Patent Title: Method for recovering an on-state forward voltage and, shrinking stacking faults in bipolar semiconductor devices, and the bipolar semiconductor devices
- Patent Title (中): 用于恢复双极半导体器件中的导通状态正向电压和收缩堆垛层错的方法以及双极型半导体器件
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Application No.: US12376199Application Date: 2006-08-04
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Publication No.: US08455269B2Publication Date: 2013-06-04
- Inventor: Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
- Applicant: Toshiyuki Miyanagi , Hidekazu Tsuchida , Isaho Kamata , Yoshitaka Sugawara , Koji Nakayama , Ryosuke Ishii
- Applicant Address: JP
- Assignee: Central Research Institute of Electric Power Industry
- Current Assignee: Central Research Institute of Electric Power Industry
- Current Assignee Address: JP
- Agency: The Webb Law Firm
- International Application: PCT/JP2006/315539 WO 20060804
- International Announcement: WO2008/015766 WO 20080207
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
In a bipolar semiconductor device such that electrons and holes are recombined in a silicon carbide epitaxial film grown from the surface of a silicon carbide single crystal substrate at the time of on-state forward bias operation; an on-state forward voltage increased in a silicon carbide bipolar semiconductor device is recovered by shrinking the stacking fault area enlarged by on-state forward bias operation. In a method of this invention, the bipolar semiconductor device in which the stacking fault area enlarged and the on-state forward voltage has been increased by on-state forward bias operation, is heated at a temperature of higher than 350° C.
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