Invention Grant
- Patent Title: Routable array metal integrated circuit package fabricated using partial etching process
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Application No.: US12848065Application Date: 2010-07-30
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Publication No.: US08455304B2Publication Date: 2013-06-04
- Inventor: Ken Lam
- Applicant: Ken Lam
- Applicant Address: US CA San Jose
- Assignee: Atmel Corporation
- Current Assignee: Atmel Corporation
- Current Assignee Address: US CA San Jose
- Agency: Fish & Richardson P.C.
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
An integrated circuit assembly is fabricated on a metal substrate strip in an array format that has raised circuitry pattern formed by photolithographic and metal etching processes. The circuitry pattern is formed on one side of the metal substrate only. The raised circuitry's etch depth extends partially through the metal substrate. Die attachment can be performed using a non-conductive material applied directly onto and around the raised circuitry features directly under the die. After wirebond and molding processes, the molded metal substrate strip assembly is processed through a metal etching process to remove the metal substrate portion that is exposed beyond the mold cap. A solder mask coating can be applied to protect the metal circuitry and to define the package pad opening to form Land-Grid-Array (LGA) packages. Solder balls can also be attached to form Ball-Grid-Array (BGA) packages.
Public/Granted literature
- US20120025375A1 ROUTABLE ARRAY METAL INTEGRATED CIRCUIT PACKAGE FABRICATED USING PARTIAL ETCHING PROCESS Public/Granted day:2012-02-02
Information query
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