Planar and nanowire field effect transistors

Invention Grant

US08455334B2 Planar and nanowire field effect transistors 失效

Title translation: 平面和纳米线场效应晶体管

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Patent Title: Planar and nanowire field effect transistors
Patent Title (中): 平面和纳米线场效应晶体管
Application No.: US12631342

Application Date: 2009-12-04
Publication No.: US08455334B2

Publication Date: 2013-06-04
Inventor: Sarunya Bangsaruntip , Guy M. Cohen , Shreesh Narasimha , Jeffrey W. Sleight
Applicant: Sarunya Bangsaruntip , Guy M. Cohen , Shreesh Narasimha , Jeffrey W. Sleight
Applicant Address: US NY Armonk
Assignee: International Business Machines Corporation
Current Assignee: International Business Machines Corporation
Current Assignee Address: US NY Armonk
Agency: Cantor Colburn LLP
Agent Vazken Alexanian
Main IPC: H01L21/84
IPC: H01L21/84

Planar and nanowire field effect transistors

Abstract:

A method for forming an integrated circuit, the method includes forming a first nanowire suspended above an insulator substrate, the first nanowire attached to a first silicon on insulator (SOI) pad region and a second SOI pad region that are disposed on the insulator substrate, a second nanowire disposed on the insulator substrate attached to a third SOI pad region and a fourth SOI pad region that are disposed on the insulator substrate, and a SOI slab region that is disposed on the insulator substrate, and forming a first gate surrounding a portion of the first nanowire, a second gate on a portion of the second nanowire, and a third gate on a portion of the SOI slab region.

Abstract(Chinese):

一种用于形成集成电路的方法，所述方法包括形成悬置在绝缘体衬底上的第一纳米线，所述第一纳米线附接到绝缘体上的第一绝缘体（SOI）焊盘区域和设置在所述绝缘体衬底上的第二SOI焊盘区域，布置在绝缘体基板上的第二纳米线，其连接到设置在绝缘体基板上的第三SOI焊盘区域和第四SOI焊盘区域，以及SOI板状区域，其设置在绝缘体基板上，并且形成围绕部分的第一栅极的第一纳米线，第二纳米线的一部分上的第二栅极和SOI板区域的一部分上的第三栅极。

Public/Granted literature

US20110133167A1 PLANAR AND NANOWIRE FIELD EFFECT TRANSISTORS Public/Granted day:2011-06-09

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/84	.....衬底不是半导体的，例如绝缘体