An ESD protection element for use in an electrical circuit having a fin structure or a fully depleted silicon-on-insulator structure. The fin structure or the fully depleted silicon-on-insulator structure contains a first connection region having a first conductivity type; a second connection region having a second conductivity type, which is opposite to the first conductivity type; and also a plurality of body regions which are formed alongside one another and which are formed between the first connection region and the second connection region. The body regions alternately have the first conductivity type and the second conductivity type. The ESD protection element has at least one gate region formed on or above at least one of the plurality of body regions, and also at least one gate control device which is electrically coupled to the at least one gate region.