Invention Grant
- Patent Title: Insulated gate semiconductor device with well region edge positioned within ring-shaped buffer trench
- Patent Title (中): 绝缘栅半导体器件,阱区边缘位于环形缓冲沟槽内
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Application No.: US13090288Application Date: 2011-04-20
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Publication No.: US08455958B2Publication Date: 2013-06-04
- Inventor: Yukio Tsuzuki , Kenji Kouno
- Applicant: Yukio Tsuzuki , Kenji Kouno
- Applicant Address: JP Kariya
- Assignee: DENSO CORPORATION
- Current Assignee: DENSO CORPORATION
- Current Assignee Address: JP Kariya
- Agency: Posz Law Group, PLC
- Priority: JP2010-98752 20100422; JP2010-260700 20101123
- Main IPC: H01L27/088
- IPC: H01L27/088

Abstract:
An insulated gate semiconductor device includes a semiconductor substrate, a drift layer on the substrate, a base layer on the drift layer, a ring-shaped gate trench dividing the base layer into a channel layer and a floating layer, an emitter region located in the channel layer to be in contact with a side surface of the gate trench, a well region located on the periphery of a cell area of the base layer and having a depth greater than a depth of the base layer, and a ring-shaped buffer trench located adjacent to and spaced from the gate trench in a length direction of the gate trench. An edge of the well region is located in an area enclosed by the buffer trench in the length direction of the gate trench.
Public/Granted literature
- US20110260212A1 SEMICONDUCTOR DEVICE Public/Granted day:2011-10-27
Information query
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