Invention Grant
- Patent Title: High performance HKMG stack for gate first integration
- Patent Title (中): 高性能HKMG堆栈,用于门控第一次集成
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Application No.: US13185112Application Date: 2011-07-18
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Publication No.: US08455960B2Publication Date: 2013-06-04
- Inventor: Frank Jakubowski , Peter Baars , Till Schloesser
- Applicant: Frank Jakubowski , Peter Baars , Till Schloesser
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Ditthavong Mori & Steiner, P.C.
- Main IPC: H01L29/00
- IPC: H01L29/00

Abstract:
Semiconductor devices are formed with a silicide interface between the work function layer and polycrystalline silicon. Embodiments include forming a high-k/metal gate stack by: forming a high-k dielectric layer on a substrate, forming a work function metal layer on the high-k dielectric layer, forming a silicide on the work function metal layer, and forming a poly Si layer on the silicide. Embodiments include forming the silicide by: forming a reactive metal layer in situ on the work function layer, forming an a-Si layer in situ on the entire upper surface of the reactive metal layer, and annealing concurrently with forming the poly Si Layer.
Public/Granted literature
- US20130020656A1 HIGH PERFORMANCE HKMG STACK FOR GATE FIRST INTEGRATION Public/Granted day:2013-01-24
Information query
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