Invention Grant
- Patent Title: Semiconductor wafer processing
- Patent Title (中): 半导体晶圆加工
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Application No.: US12596267Application Date: 2007-04-27
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Publication No.: US08456023B2Publication Date: 2013-06-04
- Inventor: Robert Bauer , Anton Kolbeck
- Applicant: Robert Bauer , Anton Kolbeck
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- International Application: PCT/IB2007/051576 WO 20070427
- International Announcement: WO2008/132559 WO 20081106
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L21/44

Abstract:
A method of processing a semiconductor wafer is provided which comprises treating a metallization layer provided on a backside of the wafer to form a plurality of channels therein, such that at least some of the channels along substantially the length thereof extend through the thickness of the metallization layer to the backside of the wafer, thereby exposing the material of the backside of the wafer. When the semiconductor wafer is separated into dies, each die is provided with a plurality of channels, which extend to an edge of the die. On attaching the die to a die attach flag by solder, the solder does not stick to the exposed material of the backside of the die, and channels are thereby formed in the solder. This allows venting of gases formed in the solder, and decreases void formation in the solder.
Public/Granted literature
- US20110227229A1 SEMICONDUCTOR WAFER PROCESSING Public/Granted day:2011-09-22
Information query
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