Invention Grant
- Patent Title: Integrated circuit with power gating
- Patent Title (中): 集成电路与电源门控
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Application No.: US13067776Application Date: 2011-06-24
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Publication No.: US08456223B2Publication Date: 2013-06-04
- Inventor: James Edward Myers , David Walter Flynn
- Applicant: James Edward Myers , David Walter Flynn
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Main IPC: H03K3/01
- IPC: H03K3/01

Abstract:
An integrated circuit includes a main power rail, a ground power rail as well as a virtual main power rail and a virtual ground power rail. Combinatorial logic circuitry is connected to draw its power from the virtual main power rail and the virtual ground power rail. Signal value storage circuitry is connected to draw its power from one of the main power rail and the ground power rail with the other power connection being to a virtual rail. The integrated circuit has an operational mode, a retention mode and a power off mode. In the retention mode, the voltage difference across the combinatorial logic circuitry is a low power voltage difference insufficient to support data processing operations whereas the voltage difference across the signal value storage circuitry is higher and is sufficient to support signal value retention within the signal value storage circuitry.
Public/Granted literature
- US20120326772A1 Integrated circuit with power gating Public/Granted day:2012-12-27
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