Invention Grant
- Patent Title: Integrated circuit chip using top post-passivation technology and bottom structure technology
- Patent Title (中): 集成电路芯片采用顶级后钝化技术和底层结构技术
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Application No.: US12722483Application Date: 2010-03-11
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Publication No.: US08456856B2Publication Date: 2013-06-04
- Inventor: Mou-Shiung Lin , Jin-Yuan Lee , Hsin-Jung Lo , Ping-Jung Yang , Te-Sheng Liu
- Applicant: Mou-Shiung Lin , Jin-Yuan Lee , Hsin-Jung Lo , Ping-Jung Yang , Te-Sheng Liu
- Applicant Address: TW Hsinchu
- Assignee: Megica Corporation
- Current Assignee: Megica Corporation
- Current Assignee Address: TW Hsinchu
- Agency: Seyfarth Shaw LLP
- Main IPC: H05K7/00
- IPC: H05K7/00 ; H01L23/02

Abstract:
Integrated circuit chips and chip packages are disclosed that include an over-passivation scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the integrated circuit chip using a top post-passivation technology and a bottom structure technology. The integrated circuit chips can be connected to an external circuit or structure, such as ball-grid-array (BGA) substrate, printed circuit board, semiconductor chip, metal substrate, glass substrate or ceramic substrate, through the over-passivation scheme or the bottom scheme. Related fabrication techniques are described.
Public/Granted literature
- US20100246152A1 INTEGRATED CIRCUIT CHIP USING TOP POST-PASSIVATION TECHNOLOGY AND BOTTOM STRUCTURE TECHNOLOGY Public/Granted day:2010-09-30
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