Invention Grant
- Patent Title: Multiple layers of memory implemented as different memory technology
- Patent Title (中): 多层内存实现为不同的内存技术
-
Application No.: US12653853Application Date: 2009-12-18
-
Publication No.: US08456880B2Publication Date: 2013-06-04
- Inventor: Robert Norman
- Applicant: Robert Norman
- Applicant Address: US CA Sunnyvale
- Assignee: Unity Semiconductor Corporation
- Current Assignee: Unity Semiconductor Corporation
- Current Assignee Address: US CA Sunnyvale
- Agency: Stolowitz Ford Cowger LLP
- Main IPC: G11C5/02
- IPC: G11C5/02

Abstract:
Circuits and methods that use third dimension memory as a different memory technology are described. The third dimension memory can be used for application specific data storage and/or to emulate conventional memory types such as DRAM, FLASH, SRAM, and ROM or new memory types as they become available. A processor-memory system implements a memory operable as different memory technologies. The processor-memory system includes a logic subsystem and a memory subsystem, which includes third dimension memory cells. The logic subsystem implements memory technology-specific signals to interact with the third dimension memory cells as memory cells of a different memory technology. As such, the memory subsystem can emulate different memory technologies. The logic subsystem can be fabricated FEOL on a substrate and the memory subsystem can be fabricated BEOL directly on top of the substrate. An interlayer interconnect structure can electrically couple the logic subsystem with the memory subsystem.
Public/Granted literature
- US20100195363A1 Multiple layers of memory implemented as different memory technology Public/Granted day:2010-08-05
Information query