Invention Grant
- Patent Title: Spin-torque transfer magneto-resistive memory architecture
- Patent Title (中): 自旋扭矩传递磁阻存储器架构
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Application No.: US13558644Application Date: 2012-07-26
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Publication No.: US08456899B2Publication Date: 2013-06-04
- Inventor: John K. DeBrosse , Yutaka Nakamura
- Applicant: John K. DeBrosse , Yutaka Nakamura
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/16
Abstract:
A method for operating a memory array device, includes initiating a write “0” state in the device, wherein the initiating the write “0” state includes inducing a first voltage in a word line of the device; and inducing a second voltage in a first bit line (BLTE) of the device.
Public/Granted literature
- US20120287705A1 Spin-Torque Transfer Magneto-Resistive Memory Architecture Public/Granted day:2012-11-15
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