Invention Grant
US08456917B1 Logic circuit for a semiconductor memory device, and method of managing an operation in the semiconductor memory device
失效
用于半导体存储器件的逻辑电路，以及管理半导体存储器件中的操作的方法
- Patent Title: Logic circuit for a semiconductor memory device, and method of managing an operation in the semiconductor memory device
- Patent Title (中): 用于半导体存储器件的逻辑电路，以及管理半导体存储器件中的操作的方法
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Application No.: US13306741Application Date: 2011-11-29
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Publication No.: US08456917B1Publication Date: 2013-06-04
- Inventor: Stefano Surico , Giuseppe Moioli
- Applicant: Stefano Surico , Giuseppe Moioli
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC
- Main IPC: G11C11/34
- IPC: G11C11/34 ; H03K19/173
Abstract:
A logic circuit for a semiconductor memory device, includes a first logic portion which stores data from a first data signal, and generates a second data signal based on the first data signal, a second logic portion which generates a first address signal and stores an address from the first address signal where data from the second data signal is to be written, and a third logic portion which generates a flag signal which indicates whether the data stored in the first logic portion is valid.
Public/Granted literature
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