A data transmission device in a semiconductor memory apparatus receives input data via a local data input/output line and output s the input data on a plurality of global data input/output lines. The data transmission device includes a write data generation block configured to receive the input data and test data and output one of input data and test data as write data in response to an activation of a test enable signal, and a loading block configured to apply the write data to one of the plurality of global data input/output lines in response to an enable signal.