Invention Grant
US08458241B2 Memory address generating method and twiddle factor generator using the same
有权
存储器地址生成方法和使用其的旋转因子发生器
- Patent Title: Memory address generating method and twiddle factor generator using the same
- Patent Title (中): 存储器地址生成方法和使用其的旋转因子发生器
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Application No.: US12096774Application Date: 2006-12-06
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Publication No.: US08458241B2Publication Date: 2013-06-04
- Inventor: Hui-Rae Cho , Gweon-Do Jo , Jin-Up Kim
- Applicant: Hui-Rae Cho , Gweon-Do Jo , Jin-Up Kim
- Applicant Address: KR Daejeon
- Assignee: Electronic and Telecommunications Research Institute
- Current Assignee: Electronic and Telecommunications Research Institute
- Current Assignee Address: KR Daejeon
- Agency: Kile Park Reed & Houtteman PLLC
- Priority: KR10-2005-0119889 20051208; KR10-2006-0118116 20061128
- International Application: PCT/KR2006/005217 WO 20061206
- International Announcement: WO2007/066964 WO 20070614
- Main IPC: G06F17/14
- IPC: G06F17/14 ; G06F15/00
Abstract:
The present invention relates to a memory address generating method and a twiddle factor generator using the memory address generating method in a fast Fourier transform (FFT) system. In the memory address generating method for generating a memory address of a twiddle factor in a fast Fourier transform (FFT) system according to an embodiment of the present invention: a) a temporary address value of a second twiddle factor is induced and generated based on a first twiddle factor; b) a control signal for controlling the system is generated based on the generated temporary address value; and c) a memory address value of the second twiddle factor is generated from the temporary address value.
Public/Granted literature
- US20080307026A1 Memory Address Generating Method and Twiddle Factor Generator Using the Same Public/Granted day:2008-12-11
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