Invention Grant
- Patent Title: Modular multiplier apparatus with reduced critical path of arithmetic operation and method of reducing the critical path of arithmetic operation in arithmetic operation apparatus
- Patent Title (中): 具有降低运算运算关键路径的模块化乘法器和降低算术运算装置运算运算关键路径的方法
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Application No.: US12660382Application Date: 2010-02-25
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Publication No.: US08458242B2Publication Date: 2013-06-04
- Inventor: Young-sik Kim , Mi-jung Noh , Kyoung-moon Ahn , Sun-soo Shin
- Applicant: Young-sik Kim , Mi-jung Noh , Kyoung-moon Ahn , Sun-soo Shin
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Onello & Mello, LLP
- Priority: KR10-2009-0042541 20090515
- Main IPC: G06F7/72
- IPC: G06F7/72

Abstract:
Provided are a modular multiplier apparatus in which a value of a long path carry (LPC) is predicted to reduce a critical path of an arithmetic operation of Montgomery modular multiplication, and a method of reducing the critical path of the arithmetic operation. The modular multiplier apparatus for obtaining a quotient and a result of an arithmetic operation of modular multiplication by using a modulus and two arbitrary constants includes: a reduction unit for obtaining a short path carry (SPC) included when a result of a modular arithmetic operation is obtained at a current stage, by using a medium calculation result; a carry predictor for predicting a long path carry (LPC) included when the result of the modular arithmetic operation is obtained at the current stage, by using the medium calculation result; and an accumulator for accumulating the result of the modular arithmetic operation by using the SPC and the LPC, wherein the medium calculation result is obtained by adding a result of a modular arithmetic operation obtained at a previous stage and a partial product of the two constants obtained at the current stage.
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