Invention Grant
US08458443B2 VLIW processor with execution units executing instructions from instruction queues and accessing data queues to read and write operands
有权
VLIW处理器具有执行单元执行来自指令队列的指令并访问数据队列以读取和写入操作数
- Patent Title: VLIW processor with execution units executing instructions from instruction queues and accessing data queues to read and write operands
- Patent Title (中): VLIW处理器具有执行单元执行来自指令队列的指令并访问数据队列以读取和写入操作数
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Application No.: US12555146Application Date: 2009-09-08
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Publication No.: US08458443B2Publication Date: 2013-06-04
- Inventor: Matthias Tramm , Manfred Stadler , Christian Hitz
- Applicant: Matthias Tramm , Manfred Stadler , Christian Hitz
- Applicant Address: LU Luxembourg
- Assignee: SMSC Holdings S.A.R.L.
- Current Assignee: SMSC Holdings S.A.R.L.
- Current Assignee Address: LU Luxembourg
- Agency: King & Spalding L.L.P.
- Main IPC: G06F9/34
- IPC: G06F9/34
Abstract:
A processor may include a plurality of processing units for processing instructions, where each processing unit is associated with a discrete instruction queue. Data is read from a data queue selected by each instruction, and a sequencer manages distribution of instructions to the plurality of discrete instruction queues.
Public/Granted literature
- US20100082947A1 VERY-LONG INSTRUCTION WORD ARCHITECTURE WITH MULTIPLE PROCESSING UNITS Public/Granted day:2010-04-01
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