Invention Grant
US08461626B2 Hetero-structure field effect transistor, integrated circuit including a hetero-structure field effect transistor and method for manufacturing a hetero-structure field effect transistor 有权
异质结场效应晶体管,包括异质结场效应晶体管的集成电路和异质结场效应晶体管的制造方法

  • Patent Title: Hetero-structure field effect transistor, integrated circuit including a hetero-structure field effect transistor and method for manufacturing a hetero-structure field effect transistor
  • Patent Title (中): 异质结场效应晶体管,包括异质结场效应晶体管的集成电路和异质结场效应晶体管的制造方法
  • Application No.: US12668097
    Application Date: 2008-05-16
  • Publication No.: US08461626B2
    Publication Date: 2013-06-11
  • Inventor: Philippe Renaud
  • Applicant: Philippe Renaud
  • Applicant Address: US TX Austin
  • Assignee: Freescale Semiconductor, Inc.
  • Current Assignee: Freescale Semiconductor, Inc.
  • Current Assignee Address: US TX Austin
  • Priority: WOPCT/IB2007/053436 20070709
  • International Application: PCT/IB2008/053467 WO 20080516
  • International Announcement: WO2009/007943 WO 20090115
  • Main IPC: H01L29/66
  • IPC: H01L29/66 H01L21/338
Hetero-structure field effect transistor, integrated circuit including a hetero-structure field effect transistor and method for manufacturing a hetero-structure field effect transistor
Abstract:
A hetero-structure field effect transistor (HFET). The HFET may include a first contact and a second contact and a hetero-junction structure. The hetero-junction structure may include a first layer made from a first semiconductor material and a second layer made from a second semiconductor material. An interface at which the first layer and the second layer are in contact with each other may be provided, along which a two dimensional electron gas (2DEG) is formed in a part of the first layer directly adjacent to the interface, for propagating of electrical signals from the first contact to the second contact or vice versa. The transistor may further include a gate structure for controlling a conductance of the channel; a substrate layer made from a substrate semiconductor material, and a dielectric layer separating the first layer from the substrate layer. The second contact may include an electrical connection between the substrate layer and the first layer. The electrical connection may include a passage through the dielectric layer filled with an electrically conducting material which is electrically connected to the first layer.
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