Invention Grant
US08461644B2 Latch-up free vertical TVS diode array structure using trench isolation 有权
立式TVS二极管阵列结构采用沟槽隔离

Latch-up free vertical TVS diode array structure using trench isolation
Abstract:
This invention discloses a transient voltage suppressing (TVS) array disposed on a semiconductor substrate supporting an epitaxial layer of a first conductivity type. The device includes a plurality of isolation trenches opened in said epitaxial layer filled with an insulation material wherein a first and second isolation trenches insulating a first semiconductor region from other semiconductor regions in the substrate. A body region of a second conductivity type is disposed in an upper part of said epitaxial layer wherein the body region extends laterally over an entire length of the first semiconductor region between said first and second isolation trenches. A bipolar transistor comprising two vertically stacked PN junctions disposed between the isolation trenches wherein, the bipolar transistor is triggered by a Zener diode comprising a bottom vertically stacked PN junction between the body region and the epitaxial layer for carrying a transient current for suppressing a transient voltage.
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