Invention Grant
- Patent Title: Substrate comprising a plurality of integrated circuitry die, and a substrate
- Patent Title (中): 包括多个集成电路管芯的衬底和衬底
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Application No.: US11243925Application Date: 2005-10-04
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Publication No.: US08461685B2Publication Date: 2013-06-11
- Inventor: Tongbi Jiang , Mike Connell
- Applicant: Tongbi Jiang , Mike Connell
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40
Abstract:
A substrate including a plurality of integrated circuitry die is fabricated or otherwise provided. The individual die have bond pads. A passivation layer comprising a silicone material is formed over the bond pads. Openings are formed through the silicone material to the bond pads. After the openings are formed, the die are singulated from the substrate. In one implementation, a method of fabricating integrated circuitry includes providing a substrate comprising a plurality of integrated circuitry die. Individual of the die have bond pads. A first blanket passivation layer is formed over the substrate in contact with the bond pads. A different second blanket passivation layer comprising silicone material is formed over the first passivation layer. Openings are formed through the first and second passivation layers to the bond pads. After the openings are formed, the die are singulated from the substrate. Other aspects and implementations are contemplated.
Public/Granted literature
- US20060030077A1 Substrate comprising a plurality of integrated circuitry die, and a substrate Public/Granted day:2006-02-09
Information query
IPC分类:
