Invention Grant
- Patent Title: Receiving circuit and methods for controlling and testing the same
- Patent Title (中): 接收电路及其控制和测试方法
-
Application No.: US13041132Application Date: 2011-03-04
-
Publication No.: US08461864B2Publication Date: 2013-06-11
- Inventor: Yuji Nakagawa
- Applicant: Yuji Nakagawa
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Fujitsu Patent Center
- Priority: JP2010-64330 20100319
- Main IPC: H03K19/00
- IPC: H03K19/00 ; H03K19/003
Abstract:
A receiving circuit includes: a terminating resistor to set a terminating level of a transmission line for transmitting a reception signal including a signal having a first level indicating a preamble; a detection circuit to detect whether a level of the transmission line is the first level or a second level; and an adjustment circuit to adjust a resistance of the terminating resistor, the adjustment circuit adjusting the resistance of the terminating resistor to a value such that the detection circuit detects the level of the transmission line as the second level when a data request is output to a transmitting side.
Public/Granted literature
- US20110227604A1 RECEIVING CIRCUIT AND METHODS FOR CONTROLLING AND TESTING THE SAME Public/Granted day:2011-09-22
Information query
