Invention Grant
- Patent Title: Low latency inter-die trigger serial interface for ADC
- Patent Title (中): ADC的低延迟片间触发串行接口
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Application No.: US13481921Application Date: 2012-05-28
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Publication No.: US08461879B1Publication Date: 2013-06-11
- Inventor: Tsing Hsu
- Applicant: Tsing Hsu
- Applicant Address: VG
- Assignee: Active-Semi, Inc.
- Current Assignee: Active-Semi, Inc.
- Current Assignee Address: VG
- Agency: Imperium Patent Works
- Agent T. Lester Wallace
- Main IPC: G11C27/02
- IPC: G11C27/02 ; H03K5/00 ; H03K17/00

Abstract:
A packaged controller for closed-loop control applications includes two dice packaged together in a semiconductor package. The first die is optimized for digital circuitry and includes a processor, an ADC, a serial bus interface, and a sequencer. The second die is optimized for analog circuitry and includes a serial bus interface, a plurality of sample/hold circuits, and an analog multiplexer. The sequencer on the first die causes a series of multi-bit values to be communicated serially across a low latency serial bus to the second die, and thereby controls the analog multiplexer and the asserting of a sample/hold signal on the second die. Under control of the sequencer, multiple voltages are captured simultaneously on the second die, and then are multiplexed one by one to the ADC on the first die for conversion into digital values. The architecture reduces complexity and cost of the overall packaged controller.
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