Invention Grant
- Patent Title: Synchronous switching in high-speed digital-to-analog converter using quad synchronizing latch
- Patent Title (中): 使用四路同步锁存器在高速数模转换器中同步切换
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Application No.: US13183370Application Date: 2011-07-14
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Publication No.: US08462034B2Publication Date: 2013-06-11
- Inventor: Bruno M. S. Santos , Antonio I. R. Leal , Carlos M. A. Azeredo-Leme
- Applicant: Bruno M. S. Santos , Antonio I. R. Leal , Carlos M. A. Azeredo-Leme
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Fenwick & West LLP
- Main IPC: H03M1/66
- IPC: H03M1/66

Abstract:
A synchronizing circuit compatible with a quad switching scheme in a digital-to-analog converter (DAC) to synchronize turning on or off of switches for steering current to a differential output. The synchronizing circuit receives signals from a decoder and synchronizes control signals to the switches by a clock signal. In one embodiment, the synchronizing circuit includes a predictor circuit and a latch circuit. The latch circuit may include four sets of cross-coupled inverters where a set of cross-coupled inverters are activated at a time. By using the synchronizing circuit in conjunction with the quad switching scheme, linearity of analog output from the DAC can be improved and data dependent noise in the analog output can be removed or reduced.
Public/Granted literature
- US20130015993A1 SYNCHRONOUS SWITCHING IN HIGH-SPEED DIGITAL-TO-ANALOG CONVERTER USING QUAD SYNCHRONIZING LATCH Public/Granted day:2013-01-17
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