Invention Grant
US08462034B2 Synchronous switching in high-speed digital-to-analog converter using quad synchronizing latch 有权
使用四路同步锁存器在高速数模转换器中同步切换

Synchronous switching in high-speed digital-to-analog converter using quad synchronizing latch
Abstract:
A synchronizing circuit compatible with a quad switching scheme in a digital-to-analog converter (DAC) to synchronize turning on or off of switches for steering current to a differential output. The synchronizing circuit receives signals from a decoder and synchronizes control signals to the switches by a clock signal. In one embodiment, the synchronizing circuit includes a predictor circuit and a latch circuit. The latch circuit may include four sets of cross-coupled inverters where a set of cross-coupled inverters are activated at a time. By using the synchronizing circuit in conjunction with the quad switching scheme, linearity of analog output from the DAC can be improved and data dependent noise in the analog output can be removed or reduced.
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