Apparatus and methods are disclosed, such as those involving a junction field effect transistor for voltage protection. One such apparatus includes a protection circuit including an input, an output, and a JFET. The JFET has a source electrically coupled to the input, and a drain electrically coupled to the output, wherein the JFET has a pinch-off voltage (Vp) of greater than 2 V in magnitude. The apparatus further includes an internal circuit having an input configured to receive a signal from the output of the protection circuit. The protection circuit provides protection over the internal circuit from overvoltage and/or undervoltage conditions while having a reduced size compared to a JFET having a Vp of smaller than 2 V in magnitude.