In a receiver, a synchronization circuit (MIX2, C1, R1, VCO) provides a set of oscillator signals (OSI, OSQ, OSX, OSY) that are synchronized with a carrier of an amplitude-modulated signal. The set of oscillator signals (OSI, OSQ, OSX, OSY) comprises a first amplitude-demodulation oscillator signal (OSX) and a second amplitude-demodulation oscillator signal (OSY) that differ in phase. A first amplitude-demodulation mixer (MIX3) mixes the first amplitude-demodulation oscillator signal (OSX) with the amplitude-modulated signal so as to obtain a first amplitude-demodulated signal (MO3). A second amplitude-demodulation mixer (MIX4) mixes the second amplitude-demodulation oscillator signal (OSY) with the amplitude-modulated signal so as to obtain a second amplitude-demodulated signal (MO4). A magnitude comparator (MDT1, MDT2, DDT) compares respective magnitudes (M+, M−) of the first amplitude-demodulated signal (MO3) and the second amplitude-demodulated signal. Accordingly, a phase-error detection signal (IPED) is obtained that varies as a function of a difference between the respective magnitudes (M+, M−) of the first amplitude-demodulated signal (MO3) and the second amplitude-demodulated signal (MO4).