Invention Grant
US08463834B2 Floating point multiplier with first and second partial product shifting circuitry for result alignment 有权
浮点乘法器,具有用于结果对齐的第一和第二部分乘积移位电路

  • Patent Title: Floating point multiplier with first and second partial product shifting circuitry for result alignment
  • Patent Title (中): 浮点乘法器,具有用于结果对齐的第一和第二部分乘积移位电路
  • Application No.: US12588962
    Application Date: 2009-11-03
  • Publication No.: US08463834B2
    Publication Date: 2013-06-11
  • Inventor: David Raymond Lutz
  • Applicant: David Raymond Lutz
  • Applicant Address: GB Cambridge
  • Assignee: ARM Limited
  • Current Assignee: ARM Limited
  • Current Assignee Address: GB Cambridge
  • Agency: Nixon & Vanderhye P.C.
  • Main IPC: G06F7/487
  • IPC: G06F7/487 G06F5/01
Floating point multiplier with first and second partial product shifting circuitry for result alignment
Abstract:
A floating point multiplier includes a data path in which a plurality of partial products are calculated and then reduced to a first partial product and a second partial product. Shift amount determining circuitry 100 analyzes the exponents of the input operands A and B as well as counting the leading zeros in the fractional portions of these operands to determine an amount of left shift or right shift to be applied by shifting circuitry 200, 202 within the multiplier data path. This shift amount is applied so as to align the partial products so that when they are added they will produce the result C without requiring this to be further shifted. Furthermore, shifting the partial products to the correct alignment in this way in advance of adding these partial products permits injection rounding combined with the adding of the partial products to be employed for cases including subnormal values.
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