Invention Grant
US08464108B2 Scan collector and parallel scan paths with controlled output buffer
有权
扫描采集器和并行扫描路径与受控输出缓冲区
- Patent Title: Scan collector and parallel scan paths with controlled output buffer
- Patent Title (中): 扫描采集器和并行扫描路径与受控输出缓冲区
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Application No.: US13589778Application Date: 2012-08-20
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Publication No.: US08464108B2Publication Date: 2013-06-11
- Inventor: Lee D. Whetsel
- Applicant: Lee D. Whetsel
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
Scan distributor, collector, and controller circuitry connect to the functional inputs and outputs of core circuitry on integrated circuits to provide testing through those functional inputs and outputs. Multiplexer and demultiplexer circuits select between the scan circuitry and the functional inputs and outputs. The core circuitry can also be provided with built-in scan distributor, collector, and controller circuitry to avoid having to add it external of the core circuitry. With appropriately placed built-in scan distributor and collector circuits, connecting together the functional inputs and outputs of the core circuitry also connects together the scan distributor and collector circuitry in each core. This can provide a hierarchy of scan circuitry and reduce the need for separate test interconnects and multiplexers.
Public/Granted literature
- US20120317453A1 POSITION INDEPENDENT TESTING OF CIRCUITS Public/Granted day:2012-12-13
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