Invention Grant
- Patent Title: Methods for layout error detection
- Patent Title (中): 布局错误检测方法
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Application No.: US13015070Application Date: 2011-01-27
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Publication No.: US08464144B2Publication Date: 2013-06-11
- Inventor: Li-Jung Cheng
- Applicant: Li-Jung Cheng
- Applicant Address: TW Taipei
- Assignee: Inventec Corporation
- Current Assignee: Inventec Corporation
- Current Assignee Address: TW Taipei
- Agency: Morris Manning & Martin LLP
- Agent Tim Tingkang Xia, Esq.
- Priority: TW99140034A 20101119
- Main IPC: G06F11/00
- IPC: G06F11/00 ; H03M13/00

Abstract:
A layout error detection method includes the following steps, reading a layout file, in which the layout file includes a plurality of elements and a plurality of coordinates, and each element is corresponding to one coordinate; reading a record table, in which the record table includes an identification column, a coordinate column, and a flag column; scanning the layout file to obtain an error detection result, in which the error detection result is corresponding to an identification data and a coordinate data; searching the identification column of the record table to judge whether the identification column has the same identifier according to the identification data, and when a judgment result is false, writing the identification data and the coordinate data of the error detection result, setting a flag value to logic 0, and marking the error detection result; and scanning the layout file repeatedly until all the elements are scanned.
Public/Granted literature
- US20120131425A1 METHODS FOR LAYOUT ERROR DETECTION Public/Granted day:2012-05-24
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