Invention Grant
- Patent Title: Three-dimensional stacked structure semiconductor device having through-silicon via and signaling method for the semiconductor device
- Patent Title (中): 具有半导体器件的通硅通孔和信号传输方法的三维堆叠结构半导体器件
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Application No.: US13080042Application Date: 2011-04-05
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Publication No.: US08471362B2Publication Date: 2013-06-25
- Inventor: Jong-joo Lee
- Applicant: Jong-joo Lee
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2010-0058233 20100618
- Main IPC: H01L21/02
- IPC: H01L21/02
Abstract:
A three-dimensional (3D) semiconductor device including a plurality of stacked layers and a through-silicon via (TSV) electrically connecting the plurality of layers, in which in signal transmission among the plurality of layers, the TSV transmits a signal that swings in a range from an offset voltage that is higher than a ground voltage to a power voltage, thereby minimizing an influence of a metal-oxide-semiconductor (MOS) capacitance of TSV.
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Information query
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