Invention Grant
- Patent Title: Redundancy control circuit and memory device including the same
- Patent Title (中): 冗余控制电路和包括其的存储器件
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Application No.: US13222070Application Date: 2011-08-31
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Publication No.: US08472269B2Publication Date: 2013-06-25
- Inventor: Byung-Chul Kim
- Applicant: Byung-Chul Kim
- Applicant Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Consulting, PLLC
- Priority: KR10-2010-0085305 20100901
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C7/06 ; G11C17/18

Abstract:
A redundancy control circuit includes an address fuse circuit and a first circuit. The address fuse circuit includes a plurality of first fuses. Each of the first fuses is configured to be cut based on a result of comparing a number of bits of a defective input address having a first logic level with a number of bits of the defective input address having a second logic level. The address fuse circuit is configured to generate a first address using the first fuses based on a cutting operation that depends on the result of comparing. The first circuit is configured to output either the first address or a second address that is an inverted address of the first address as a repair address, wherein a logic level of each of bits of the repair address is the same as that of the defective input address.
Public/Granted literature
- US20120051165A1 REDUNDANCY CONTROL CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME Public/Granted day:2012-03-01
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