Invention Grant
- Patent Title: Stacked semiconductor package and method for manufacturing the same
- Patent Title (中): 堆叠半导体封装及其制造方法
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Application No.: US13096143Application Date: 2011-04-28
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Publication No.: US08476751B2Publication Date: 2013-07-02
- Inventor: Kyu Won Lee , Cheol Ho Joh , Eun-Hye Do , Ji Eun Kim , Hee Min Shin
- Applicant: Kyu Won Lee , Cheol Ho Joh , Eun-Hye Do , Ji Eun Kim , Hee Min Shin
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: William Park & Associates Patent Ltd.
- Priority: KR10-2010-0042457 20100506
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
A stacked semiconductor package includes a semiconductor package module including a plurality of semiconductor packages each of which has a first surface, a second surface facing away from the first surface, side surfaces connecting the first surface and the second surface and through-holes formed on the side surfaces to pass through the first surface and the second surface and which are stacked such that their through-holes vertically connect with one another, and adhesive members which are formed between the semiconductor packages and attach the semiconductor packages to one another, a main substrate supporting the semiconductor package module and formed, on a third surface thereof facing the semiconductor package module, with main connection pads which are aligned with the through-holes, and conductive connection members formed in the through-holes and electrically connecting the semiconductor packages with the main connection pads.
Public/Granted literature
- US20110272820A1 STACKED SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2011-11-10
Information query
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